Nvidia’s 70% HBM4 Allocation to SK Hynix

By late 2025, nearly every major memory maker was operating at or near full capacity, and 2026 production slots were almost sold out. Yet Micron does not plan to ship HBM from its Hiroshima expansion until summer 2028.

Nvidia adopted a faster HBM generation; SK Hynix stacked more capacity into each chip; TSMC expanded advanced packaging as Nvidia reserved most of the output. Micron left a consumer brand and committed capital through 2035, while India added another semiconductor incentive program. Nvidia, its suppliers and policymakers did not coordinate these moves, but all responded to the same AI infrastructure bottleneck.

As accelerator performance rose, memory bandwidth, capacity and physical integration became co-equal determinants of useful system performance. A memory supplier no longer wins the most valuable business merely by producing DRAM bits at scale. It must deliver the right generation, in the right stack, through available packaging, on a schedule already incorporated into an accelerator platform.

Commodity markets clear through price. This market increasingly clears through qualification, reservations and relationships, with price arriving after customers ask, “Can you actually ship it?”

The accelerator moved scarcity next door

At the builder layer, Nvidia’s H200 accelerator moved from HBM3 at 5.3Gbps per pin to HBM3E at 6.5Gbps per pin. Nvidia redesigned the system around the availability of a new memory generation.

SK Hynix then started mass-producing 12-layer HBM3E with 36GB per chip, 50% more capacity than its previous generation. Bandwidth and capacity were advancing together because accelerator performance depended increasingly on both. More calculation without enough nearby data movement creates an expensive waiting problem.

Accelerator makers increased the economic value of memory bandwidth; larger models and workloads increased the value of capacity; denser systems increased the value of stacking and packaging. Suppliers had to satisfy all four constraints at once.

Memory suppliers faced tightness beyond HBM in server DDR5, advanced storage and low-power architectures. But HBM remains the sharpest edge because it combines high performance with difficult integration and concentrated supply. It is where the new allocation logic is easiest to see.

A buyer without a reservation can see a quoted market price and still have no claim on output.

Suppliers serve systems customers before retail shelves

Micron’s decision to exit Crucial expressed that structural shift at the company level. In December 2025, Micron said it would leave the consumer business by February 2026 and concentrate on advanced memory for AI data centers. Consumer memory had not ceased to matter; the opportunity cost of serving it had risen.

Micron and its peers direct constrained fabs, engineering attention and customer support toward the business with the highest system value. A consumer module is judged primarily on capacity, price and compatibility. Advanced data-center memory helps determine the performance and shipment schedule of an entire AI platform. The same nominal unit of manufacturing capacity therefore supports very different economics.

Micron’s fiscal third quarter made the incentive unusually clear. The company reported revenue of $41.46 billion, up 346% year over year, with an 84.9% gross margin and guidance above estimates. Those figures do not prove the cycle has disappeared. They show why Micron would redirect scarce resources toward AI memory while demand remains qualified, reserved and high margin.

HBM-focused vendors can leave fewer resources for client products, giving other suppliers an availability advantage in those channels. Consumer demand still sets prices at the margin for some products, but the retail channel no longer has first claim on capacity.

HBM is valuable only when the package works

System builders cannot solve an HBM shortage by buying memory alone. AI infrastructure is a coupled computer: accelerator, memory, interconnect, power and packaging must work together. Improving one component does not create a deployable system if another cannot be integrated at the necessary scale.

TSMC illustrates the problem. The company said CoWoS capacity was growing at an 80% compound annual rate while Nvidia had reserved most of it. Even at that pace, Nvidia’s reservations absorb most new output before other buyers can claim it.

Memory makers can produce finished DRAM and still lack usable HBM supply. They must stack the memory and incorporate it alongside processors through a packaging ecosystem whose capacity is also concentrated. TSMC and its partners in Taiwan add another qualification and geography layer between a memory wafer and a working AI system.

Customers cannot treat HBM as a bag of interchangeable bits. They need validated memory inside a shippable platform, with the memory generation, accelerator design and packaging capacity aligned. A surplus in one layer cannot compensate for a shortage in another.

Nvidia does more than purchase memory. Its platform choices determine which suppliers receive qualification, which generation becomes commercially important and which packaging capacity must be reserved. The buyer helps define the product that the supplier can sell.

Nvidia turns qualification into allocation power

At the high end, accelerator customers must qualify suppliers before treating their products as interchangeable. In 2024, Samsung’s HBM3 was cleared for Nvidia’s H20 accelerator for China while its HBM3E remained under testing. A supplier can manufacture advanced memory and still lack access to a particular platform or generation.

Nvidia can turn that qualification into a competitive advantage for its chosen supplier. Sources said Nvidia assigned roughly 70% of its 2026 HBM4 demand to SK Hynix, while Counterpoint estimated that SK Hynix would hold 54% of the global HBM4 market that year. By assigning that demand, Nvidia absorbs capacity, reinforces SK Hynix’s operating experience and places it at the center of the next platform cycle.

SK Hynix built that position before the AI boom. Its rise past Samsung in market value followed 14 years of investment in HBM. Once accelerator demand made bandwidth scarce, that accumulated capability earned a premium that ordinary DRAM scale could not immediately reproduce.

Samsung and Micron are still competing for the next allocation. Samsung and AMD signed a preliminary agreement covering HBM4 for MI455X data-center accelerators and DDR5 for the Helios platform. Samsung also began shipping 12-layer HBM4E samples to major clients while SK Hynix targeted the second half of 2026 for its own samples. Nvidia can reallocate demand if a rival qualifies a better product, secures packaging and commits output.

To convert that opening into orders, Samsung or Micron needs both a memory design and a validated place in the customer’s system plan. Buyers need performance and confidence that reserved capacity will become packaged output. Neither side can treat the other as a spot-market abstraction.

Governments now finance the bottleneck

Memory producers can manage classic corrections through utilization, inventories and delayed spending. Micron, SK Hynix and their suppliers are responding further upstream with new fabs, wafer supply, stacking capacity, packaging and geographic redundancy. Those assets take years and large capital commitments to assemble, moving the adjustment from warehouse shelves to industrial policy.

Micron raised its US commitment to $250 billion through 2035, including another $50 billion for projects in New York, Idaho, Virginia and elsewhere. It also invested $500 million in GlobalWafers. Without more upstream wafer supply, new memory fabs would merely move the bottleneck one step backward.

Micron has also broken ground on a ¥1.5 trillion, roughly $9.3 billion, expansion in Hiroshima, with HBM shipments planned from summer 2028. SK Hynix sought about $29.4 billion through a US listing and said the proceeds would support additional capacity. Both companies are financing output whose useful life must extend well beyond the current product cycle.

Micron and SK Hynix are using current margins and reservations to finance an AI memory capex cycle whose capacity arrives years later. Their expansions require facilities, tools, materials, packaging and customer qualification rather than a generic inventory order.

India committed another $13.3 billion to domestic chipmaking, building on a $10 billion program launched in 2021 that attracted investments from Micron and others. The program is broader than HBM, but India is pursuing the same logic: when advanced computing depends on a few qualified supply chains, local access becomes a policy objective.

Governments can add capacity, distribute risk and subsidize the long wait, but they can also make coordination harder. SEMI, whose members include Micron and Samsung, warned that US interventions affecting chip prices or production capacity could worsen shortages. Rules that distort one supplier’s output or pricing can propagate through customers whose systems were designed around that supply.

The old cycle survives inside the new regime

SK Hynix is wagering that reservations, AI demand and qualification will weaken memory’s decades-long boom-and-bust cycle. Its chief executive forecast the industry’s worst supply shortage in 2027, with demand exceeding supply beyond 2030. But three counterforces keep the old cycle alive.

First, system designers do not have to use HBM for every AI workload. Intel’s Crescent Island data-center GPU uses LPDDR5X rather than HBM and is positioned for agentic AI. That design trades memory type, cost and system architecture against peak HBM performance. Nvidia has also used LPDDR5X in its Vera CPU designs. If workloads can use alternative memory systems, the binding constraint can move again.

Second, Samsung and Micron make supplier concentration contestable. Samsung’s HBM4E sampling and preliminary AMD agreement show that qualification is an active race, not a permanent certificate. Micron’s capacity program is intended to expand its own position. SK Hynix’s lead matters precisely because its rivals have a strong incentive to erode it.

Third, Micron and its peers are committing enormous sums to capacity that will arrive slowly. Their plans through 2035 assume durable AI demand across multiple generations. If architectures become less memory-intensive, alternative memory wins specific workloads or customer spending weakens, capacity financed under shortage economics can arrive under weaker economics, reviving the cycle the companies hoped to tame.

Investors continue to price that uncertainty. Micron and Sandisk each fell more than 13% during a June technology selloff despite the demand narrative. SK Hynix later suffered its largest one-day decline in Seoul after its strong Nasdaq debut. Those selloffs are not operating evidence, but investors do not treat the shortage’s duration as settled.

Micron, SK Hynix and their investors are not betting on permanent scarcity; they are betting that qualified demand and reservations will absorb supply that arrives years after customers first claimed it.

The market clears before a consumer sees a price

A buyer designing an AI system for 2028 cannot wait for memory to appear on a distributor’s shelf. It must choose an architecture, qualify a supplier and secure packaging while fabs are still under construction.

Nvidia and its peers use the interval between nearly sold-out 2026 slots and Micron’s first planned Hiroshima HBM shipments in summer 2028 to decide which memory enters a platform; suppliers use it to decide which customers get capacity.

Consumer memory still has a price. Advanced AI memory has a chain of custody, and price arrives only after that chain is secured.