ASML Customers Eye 2030; Memory Slots Fill for 2026

ASML says it cannot fully meet demand for semiconductor tools in 2027 and 2028, even as customers express interest in orders for 2029 and 2030. A machine that eventually prints an accelerator’s logic wafer cannot reserve the memory stack that will sit beside it.

AI’s manufacturing bottleneck has become a chain. ASML’s long horizon confirms that leading-edge lithography remains scarce, but the least available complement—memory, packaging, substrates, optics or power—determines when a buyer can deploy the finished system. A place in the tool queue buys the possibility of future wafer capacity, not a delivery date for working AI infrastructure.

ASML’s queue measures the length of the investment cycle

ASML said in October that its previously planned 30% capacity increase for 2027 and 2028 would still fall short of AI-driven customer demand. The following day, it raised the lower end of its 2026 net-sales forecast from €43 billion to €44 billion, leaving the upper end at €45 billion. Those statements make a stronger case for sustained spending on chipmaking capacity than a single quarter of orders could.

They do not make every expression of interest a booked machine. ASML reported €11.66 billion in third-quarter sales, slightly below the €11.72 billion estimate, even as it beat the profit estimate. In July 2025, amid tariff uncertainty, the company had said it could not confirm growth for 2026. Customers plan fabs years ahead, but their plans can change before interest becomes a delivery commitment.

ASML appeared in 35 articles in the earlier comparison period and 50 in the later one. Those counts measure attention rather than machine supply. Intel put EUV tools on a high-volume production schedule at its Ireland plant in 2023, years before ASML’s warning about 2027–28.

Memory allocation gives the finished chip a second calendar

Nvidia’s 2023 H200 design replaced HBM3 rated at 5.3Gbps per pin with HBM3E rated at 6.5Gbps per pin. Nvidia could improve the accelerator by changing the memory beside its logic die. That design choice also made a memory supplier’s production schedule part of the accelerator’s delivery schedule.

By November 2025, industry executives said nearly all major memory makers were operating at or near full capacity and that 2026 production slots were almost sold out. The reported scramble had moved beyond spot purchases: memory makers were seeking longer-term agreements, and sources said Nvidia had allocated about 70% of its 2026 HBM4 demand to SK Hynix. An accelerator buyer could have access to leading-edge logic and still lack its intended memory configuration.

Packaging adds another production handoff. TSMC and its Taiwanese partners have become increasingly important to advanced packaging, the work that integrates components into a usable processor. Intel has described the United States as holding only 3% of global advanced-packaging capacity. That concentration makes packaging worth reserving; it does not, by itself, establish packaging as the binding constraint today. ASML’s tool plans and the reports on Nvidia’s HBM allocation do not match tool deliveries, wafer output, memory allocations and packaging throughput for the same customers.

A wafer reservation ends at the next factory door

TSMC reportedly urged clients to seek N2 allocation as far out as the second quarter of 2027, with large allotments nearly sold out for the following two years. A customer pursuing that wafer slot is making a different reservation from a foundry pursuing an ASML tool. Neither reservation automatically covers HBM, assembly or the equipment required to connect processors inside a cluster.

Samsung and TSMC have committed to adopting ASML’s High-NA EUV machines by 2028 and 2030, respectively, alongside Intel. Neither Samsung nor TSMC specified binding tool quantities or shared delivery-slot reservations in the reported adoption targets. An announced process path can guide engineering and capital spending without settling how many finished systems a customer can obtain in a given year.

The advanced-packaging buildout follows a different schedule from leading-edge wafer capacity. Each operator must qualify its own process and make its own allocation decisions before a buyer can treat the two schedules as one.

Faster EUV leaves other lead times intact

ASML plans to make at least 60 standard EUV machines in 2026, 36% more than it sold in 2025. Its researchers also raised EUV light-source output from 600W to 1,000W; ASML says the advance could yield 50% more chips by 2030. More machines and greater throughput could materially loosen the lithography constraint.

ASML must coordinate a supply chain spanning 2,000 companies to build its own tools. Elsewhere in equipment, Applied Materials is ramping manufacturing capacity, while Lam Research plans to spend more than $3 billion over five years on an R&D network intended to increase experiment capacity by more than 50%. Tool production, process qualification and usable wafer output occupy successive stages; investment in one stage does not erase the work at the next.

The chain continues past the fab. AI demand has strained supplies of lasers, optical substrates, fiber and connectors. Data-center builders have faced shortages of parts, property and power, with cooling-system lead times reported at five times longer. A foundry can finish a wafer before a customer has the network components or the commissioned building needed to use the chips made from it.

The buyer has to hold several places in line

Nvidia’s reported HBM4 allocation illustrates one response: negotiate memory supply on its own timetable rather than assume wafer capacity will bring memory with it. Buyers also need to account for substrates and boards. Industry insiders identified PCBs and chip substrates as constraints for consumer-electronics makers as AI production absorbed capacity. Even as fabs add capacity, a substrate supplier can still hold up an accelerator buyer.

ASML has customers looking toward 2029 and 2030; at the other end of that planning horizon, a data-center rack still has an empty socket.