/
Navigation
Chronicles
Browse all articles
Explore
Semantic exploration
Research
Entity momentum
Nexus
Correlations & relationships
Story Arc
Topic evolution
Drift Map
Semantic trajectory animation
Posts
Analysis & commentary
Pulse API
Tech news intelligence API
Browse
Entities
Companies, people, products, technologies
Domains
Browse by publication source
Handles
Browse by social media handle
Detection
Concept Search
Semantic similarity search
High Impact Stories
Top coverage by position
Sentiment Analysis
Positive/negative coverage
Anomaly Detection
Unusual coverage patterns
Analysis
Rivalry Report
Compare two entities head-to-head
Semantic Pivots
Narrative discontinuities
Crisis Response
Event recovery patterns
Connected
Search: /
Command: ⌘K
Embeddings: large
TEXXR

Chronicles

The story behind the story

← → days · ↑ ↓ browse · Enter similar · o open

TSMC says it is has begun the installation of 3nm process fabrication lines and is on track to begin volume chip production in H2 2022

TSMC is fast advancing its manufacturing processes.  The foundry maintains that its 3nm fab project remains on schedule, with the technology to be ready …

DigiTimes

Context & Ripple Effects

This June 2020 report is the opening entry in a two-year confirmation chain: TSMC reiterated the H2 2022 target that August alongside claims that its 5nm N5 chips would use 30% less power than N7 ($3nm on track, N5 shipping in products)], then layered 4nm risk production for end-2021 onto the same roadmap (4nm risk production at end of 2021), while breaking ground on an Arizona 5nm fab without slipping the Taiwan 3nm schedule.

Why it holds up: by mid-2022 TSMC had detailed five separate N3-class node iterations feeding off this line (five 3nm-class node iterations), and the line itself reached mass production that December, ~35% less power than 5nm, trailing only Samsung to the node.

First-order effects

  • Equipment installation starting now commits TSMC's capital roughly two years ahead of revenue, locking the Hsinchu fab's tool set before any customer tape-out can validate demand at 3nm.
  • The schedule keeps TSMC's lead customers on a predictable node cadence — 5nm in products during 2020, 3nm volume in H2 2022 — which anchors their own product roadmaps.

Second-order effects

  • Samsung reaching 3nm mass production first (TSMC begins mass producing 3nm chips in December 2022) turns the node race into a yield-and-volume contest rather than a first-announcement one, pressuring TSMC to make N3 economics pay immediately.
  • Concurrent expansion — the Arizona fab, the approved 2nm Taiwan plant with 2023 equipment installs (final approval for a 2nm plant), and the planned Sony image-sensor joint venture — forces TSMC to absorb several years of forecast margin dilution across simultaneous ramps.

Third-order effects

  • If the pattern holds, leading-edge foundry capacity structurally consolidates: only players willing to commit billions per node years in advance — effectively TSMC and Samsung — stay in the game, shrinking the viable field each generation.
  • The multi-node strategy (N3 iterations plus N2 targeted for 2025) points toward extended node lifetimes monetized through variants rather than clean annual shrinks, changing how foundry pricing power accrues over each generation.

The trend: Leading-edge chipmaking is consolidating into a two-player cadence in which each node transition demands multi-year pre-committed fab and equipment investment, with TSMC's execution discipline setting the industry's clock.

Discussion

  • @counternotions Kontra on x
    At this rate by 2025, Apple and manufacturer partner TSMC will unveil the A16 iPhone CPU that's...invisible, at 0 nanometer. https://appleinsider.com/...