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Intel's partner shares chip giant's manufacturing process technology roadmap: 7nm EUV in 2021, then 5nm in 2023, 3nm in 2025, 2nm in 2027, and 1.4 nm in 2029

One of the interesting disclosures here at the IEEE International Electron Devices Meeting (IEDM) has been around new and upcoming process node technologies.

AnandTech Dr. Ian Cutress

Context & Ripple Effects

At the IEEE International Electron Devices Meeting, a partner speaking on Intel's behalf put dates on the post-10nm era just months after Intel itself had shared its roadmap through 2023 with a first 7nm product targeted for 2021. The disclosure commits Intel to EUV lithography at 7nm — the technology chipmakers were only weighing for mass production back when Moore's Law slowdown made EUV adoption an open question in 2016.

First-order effects

  • Customers and partners now have dated milestones through 2029 — 7nm EUV in 2021 stepping down to 1.4nm — that make Intel's execution measurable year by year rather than negotiable slide-ware.
  • TSMC's published cadence, with high-volume 3nm production starting in H2 2022 versus Intel's 3nm slot in 2025, frames this roadmap as a two-to-three-year race gap that buyers of leading-edge wafers can price directly.

Second-order effects

  • Intel's actual node timeline diverged from these dates: its first EUV node shipped as Intel 4 in 2022 with claimed 21.5% higher frequencies or 40% power reduction versus Intel 7, forcing a renamed and resequenced roadmap to stay credible against TSMC.
  • By 2024 the cadence pressure had produced a new unannounced tier — leaked slides putting Intel's 14A in 2026 and a first 1nm-class Intel 10A in late 2027 — effectively re-running this 2019 exercise with tighter spacing.

Third-order effects

  • Process roadmaps disclosed at technical forums like IEDM have hardened into competitive instruments: once one player publishes dated nodes, rivals must counter-publish or concede the perception of falling behind, tying foundry credibility to hitting announced cadences regardless of slips.

The trend: Leading-edge logic is consolidating around whichever manufacturer can hold a public EUV-era node cadence, turning roadmap disclosures themselves into the battleground between Intel and TSMC.

Discussion

  • @underfox3 Underfox on x
    About this article: The “1.4nm in 2029” is the new “10GHz by 2005 running at < 1 volt”. Any similarity between these articles ISN'T coincidental and clearly reflects that Intel has not yet been able to grasp the reality of the post-moore era. https://www.anandtech.com/...
  • @whatthebit Stefan Constantine on x
    Intel thinks it can make 1.4 nanometer chips by the end of the coming decade. ONE POINT FOUR NANO METERS I call bullshit, but hey, can you imagine how wild those chips are going to be once they do end up shipping? https://www.anandtech.com/... https://twitter.com/...
  • @hpc_guru Hpc Guru on x
    For some reason, Intel has a hard time acknowledging the end of Moore's Law. “It's worth also pointing out, based on the title of this slide, that Intel still believes in Moore's Law. Just don't ask how much it'll cost.” https://www.anandtech.com/... #HPC @Underfox3 @IanCutress h…
  • @benbajarin Ben Bajarin on x
    Interesting. I have never doubted the technical aspect of Moore's Law continuing. It is the economic part of the law, that costs also come down, that I maintain has killed it. https://twitter.com/...
  • @iancutress Dr. Ian Cutress on x
    I got the slide that was shown yesterday. Intel believes it can do a two year cadence on future process nodes, all the way to 1.4nm. That's very ambitious. https://twitter.com/...