Sources: TSMC is developing advanced AI chip packaging tech, internally called “EMIB-like”, similar to Intel's Embedded Multi-die Interconnect Bridge technique
Taiwan Semiconductor Manufacturing Co. is developing an advanced chip-packaging technology similar to what Intel already offers …
Context & Ripple Effects
Advanced packaging is becoming a central capacity and product-design lever for AI chips. TSMC had already been preparing a panel-level packaging approach and reported rapid growth in CoWoS as it expanded capacity, while Nvidia had reserved much of that capacity.
Intel has been building packaging into a foundry-service differentiator, including reported talks with Google and Amazon, and MediaTek has already begun using Intel packaging alongside TSMC's. TSMC pursuing a comparable bridge-style option puts the focus on the breadth of each supplier's packaging menu, not just wafer fabrication.
First-order effects
- TSMC adds a potential new advanced-packaging path to its AI-chip roadmap, aimed at connecting multiple dies in a package in a manner comparable to Intel's EMIB approach.
- Intel's packaging advantage faces a more direct competitive response from the largest contract chipmaker, though this report concerns development rather than an announced production service or customer win.
Second-order effects
- Chip designers seeking multi-die AI products could gain another prospective sourcing and architecture option if TSMC commercializes the technology, reducing the need to treat a particular packaging method as exclusive to Intel.
- Intel will face greater pressure to differentiate its packaging offer through execution, capacity, customer support, or integration with its foundry services; TSMC's existing CoWoS capacity expansion raises the stakes.
Third-order effects
- If comparable bridge-style packaging becomes available across major foundries, advanced packaging is likely to compete more on manufacturability, capacity and ecosystem support than on a single proprietary interconnect technique.
- The pattern points to packaging becoming a core battleground in heterogeneous AI compute: value and customer lock-in may increasingly sit in how chips, memory and interconnects are assembled, alongside leading-edge wafer production.
The trend: AI-driven multi-die designs are turning advanced packaging from a specialist capability into a competitive pillar of foundry strategy.