Intel and Micron launch their jointly-developed QLC NAND flash memory that trades write performance and endurance for lower cost
Intel and Micron are announcing today that their jointly-developed QLC NAND flash memory is now available, and Micron is now shipping the first solid state drive based …
Context & Ripple Effects
QLC lands at an awkward moment for the duo: months ago Intel and Micron announced they will wind down their NAND partnership after third-generation 3D NAND, keeping only the 3D XPoint collaboration alive. So this launch is effectively the last jointly-branded flash generation — a part designed to squeeze more bits out of the same silicon by accepting weaker write endurance.
The move completes the arc that began when the pair introduced 3D NAND promising to triple SSD capacity: each layer added since has been about cost-per-bit first, speed second. QLC pushes that logic to its conclusion, and it is Micron, not Intel, moving first with a shipping drive.
First-order effects
- Micron now sells the first QLC-based SSD, giving it a lower cost-per-bit product aimed at capacity-sensitive buyers while Intel fields the same flash on its side of the split venture.
- Buyers get denser drives at the explicit price of worse write performance and endurance, making QLC unsuitable for write-heavy workloads even where it wins on dollars per terabyte.
Second-order effects
- With the NAND partnership already set to dissolve after third-gen 3D NAND, both companies must now fund QLC process development alone — raising their per-company R&D burden just as the shared-fab economics that made the alliance attractive expire.
- Cheaper QLC shifts the competitive line inside each vendor's own portfolio: QLC drives undercut the company's existing TLC parts on price, forcing tiering between cheap-capacity and performance SKUs rather than competition only against rival vendors.
Third-order effects
- If QLC economics hold, flash stops being one product category and splits into a cost tier chasing hard-drive territory and a performance tier anchored by technologies like 3D XPoint — with the Intel-Micron breakup meaning future generations of each tier come from separate roadmaps.
- A market segmented by endurance and price invites buyers to match media to workload — archival and read-heavy data on QLC, hot writes elsewhere — which is how storage architectures reorganize around per-bit cost curves rather than single-drive generalists.
The trend: NAND is bifurcating into cost-optimized QLC for capacity workloads and premium layers for performance, just as the Intel-Micron joint development model that produced both ends of the spectrum winds down.