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AMD unveils Zen 4 CPU roadmap, including a 96-core Genoa chip in 2022 and a 128-core chip in 2023, both using a 5nm TSMC process that doubles power efficiency

Paul Alcorn / Tom's Hardware :

Tom's Hardware Paul Alcorn

Context & Ripple Effects

AMD's roadmap set out a 5nm, high-core-count path for its data-center CPUs. The plan was subsequently reflected in the 96-core fourth-generation Epyc Genoa launch, which added DDR5, PCIe 5.0, and CXL support.

Later coverage shows AMD continuing the same server-CPU scaling strategy: its Zen 5-based EPYC Turin plan raised the ceiling to 192 cores on a 3nm process. That makes the Zen 4 roadmap an early marker of AMD tying core density and process-node advances together.

First-order effects

  • Data-center buyers gained a defined upgrade path centered on 96-core Genoa in 2022 and a planned 128-core successor in 2023, with AMD positioning power efficiency as part of the value proposition.
  • TSMC becomes the manufacturing partner behind both planned Zen 4 server chips, concentrating execution risk and supply dependence around its 5nm process.

Second-order effects

  • AMD's server-platform transition raises the value of compatible memory, interconnect, and system upgrades, as the later Genoa launch paired higher core counts with DDR5, PCIe 5.0, and CXL.
  • Rival server-CPU suppliers must answer a roadmap that competes on both cores per socket and efficiency, rather than treating either metric as a standalone differentiator.

Third-order effects

  • AMD's progression from the 96-core Genoa generation to the 192-core Turin generation points to a durable compute-capacity race in which process transitions and core scaling are jointly used to increase server density.
  • If this cadence persists, server buyers will increasingly evaluate CPU roadmaps as platform-refresh decisions, with node access and ecosystem support shaping vendor competitiveness alongside raw core counts.

The trend: Data-center CPU competition is shifting toward denser, more efficient platforms built by coupling rising core counts with successive TSMC process nodes.

Discussion

  • Phoronix Michael Larabel on x
    AMD Shares Early Details Of Zen 4 Genoa, Bergamo
  • @sachinvats Sachin Sharma on x
    @GerberKawasaki @PalantirVision Apple changed the game with M1 silicon. it is so BIG & far reaching ->we have entered the era of custom silicon. Companies like GOOG with TPU & TSLA with DPU is already following. Hopefully MSFT up the game with SQ series. AMD is ruling the console…
  • @abdullin @abdullin on x
    AMD announcements are what Apple presentations used to be. https://twitter.com/...