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Chronicles

The story behind the story

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MIT researchers have designed a chip with tens of thousands of artificial brain synapses called memristors that could effectively recall images in high detail

Darrell Etherington / TechCrunch :

TechCrunch Darrell Etherington

Context & Ripple Effects

This memristor result extends a long MIT thread in analog, brain-inspired silicon: the same lab previously built a special-purpose neural network chip promising up to 7x speedups at ~95% lower power. The new work moves the argument from speed to fidelity, showing an analog device can recall images in high detail rather than just accelerate math.

It lands in a field where the big players have already committed: Intel has scaled its neuromorphic line from the 64-chip Pohoiki Beach system to Hala Point at Sandia with 1,152 Loihi 2 processors, while Cerebras bet on keeping data on-die via wafer-scale SRAM and SoftBank and Intel formed Saimemory around low-power stacked DRAM. All three routes attack the same problem this MIT paper targets — moving data costs more than computing on it.

First-order effects

  • MIT gains a working demonstration that tens of thousands of memristors can perform high-detail image recall in analog form, giving the lab's earlier efficiency claims a memory-centric proof point.

Second-order effects

  • Intel's neuromorphic roadmap and the SoftBank–Intel Saimemory venture now compete against a third approach — resistive analog memory — for research credibility and partners chasing power-constrained AI.

Third-order effects

  • If analog in-memory devices keep closing the accuracy gap with digital accelerators, AI silicon fragments further into specialized camps — digital-plus-HBM, wafer-scale SRAM, spiking neuromorphic, and memristive — each claiming the power budget that generic GPUs leave on the table.

The trend: AI hardware is splitting away from general-purpose digital accelerators toward workload-specific, data-in-place designs — analog memristors, neuromorphic processors, and stacked DRAM alike — driven by the cost of shuttling data.

Discussion

  • @dannycrichton Danny Crichton on x
    There is so much interesting news coming out of next-gen silicon these days. Now to get used to writing “neuromorphic” https://twitter.com/...
  • @mitengineering MIT Engineering on x
    When they ran the chip through several visual tasks, the chip was able to “remember” stored images and reproduce them many times over, in versions that were crisper and cleaner compared with existing memristor designs made with unalloyed elements https://news.mit.edu/... @MITMech…
  • @mitmeche Mit MechE on x
    A team of researchers led by Associate Professor Jeehwan Kim have designed a “brain-on-a-chip,” smaller than a piece of confetti that could advance the development of small, portable #AI devices https://news.mit.edu/...