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Chronicles

The story behind the story

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HPE partners with AMD to use its chips in HPE's $600M US DOE supercomputer contract announced last August to optimize AI and ML for nuclear weapons support

Stephanie Condon / ZDNet :

ZDNet Stephanie Condon

Context & Ripple Effects

The $600M Department of Energy machine was originally Cray's contract win, secured while HPE was mid-acquisition of Cray — so this AMD announcement is the first real glimpse of what the combined company intends to build. The silicon choice also pays off the DOE's $258M exascale R&D award, which seeded AMD, Cray, HPE, IBM, Intel, and Nvidia three years earlier to develop exascale designs capable of competing with China.

First-order effects

  • AMD converts its DOE R&D funding into a flagship design win: its chips will run the AI and ML workloads supporting nuclear weapons research in a $600M national-lab system.
  • HPE's post-Cray-acquisition roadmap now centers on AMD silicon for government-scale machines, a different bet from its earlier ARM-based government supercomputer play.

Second-order effects

  • Intel, IBM, and Nvidia — co-recipients of the same 2017 exascale R&D money — now face a national-security customer that has picked a rival's silicon for its most sensitive workloads.
  • A proven nuclear-weapons-grade deployment strengthens AMD's credibility for subsequent government compute programs, the pattern that later produced the $1B Lux and Discovery supercomputer partnership.

Third-order effects

  • DOE exascale procurement is consolidating around fewer vendor pairs, with national-lab contracts functioning as anchor customers that de-risk a chipmaker's roadmap and crowd out the rest of the 2017 R&D cohort.
  • If HPE-Cray keeps winning on AMD silicon, supercomputing contracts become a two-company platform rather than a six-vendor research ecosystem — a structural narrowing the DOE itself set in motion with its R&D awards.

The trend: US government exascale computing is consolidating around AMD silicon, with DOE national-lab contracts serving as the anchor wins that validate a chip vendor's roadmap.

Discussion

  • @patrickmoorhead Patrick Moorhead on x
    I am very interested to see the I/O architecture between AMD's Zen4 and the new GPU and I/O between the GPUs. And the programming model. Must be something unique here. https://twitter.com/...