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Intel to acquire Santa Clara-based fabless chip maker eASIC, says startup's ~120 employees will join Intel's Programmable Solutions Group

Ian Cutress / AnandTech :

AnandTech Ian Cutress

Context & Ripple Effects

Intel is buying eASIC, a Santa Clara-based fabless startup whose roughly 120 employees will fold into the Programmable Solutions Group — the unit built around Intel's Altera acquisition. The deal is a talent-and-technology tuck-in rather than a product line purchase, and it lands just two months before Intel's similar move on SoC interconnect startup NetSpeed Systems.

The arc matters because this same programmable unit keeps absorbing small design teams — including x86 CPU engineers from VIA's Centaur subsidiary in 2021 — and by late 2023 Intel was weighing a public listing or investor sale for the programmable chip business itself. What Intel assembles here may eventually stand alone.

First-order effects

  • About 120 eASIC employees join Intel's Programmable Solutions Group immediately, giving the FPGA-focused unit in-house structured-ASIC expertise for customers who want ASIC-like cost without full custom-mask volume commitments.
  • Intel adds a second Bay Area fabless design team within months of the NetSpeed deal, shifting its programmable roadmap toward fixed-function accelerators alongside reconfigurable logic.

Second-order effects

  • Competing programmable-logic vendors now face an Intel that can offer a migration path from FPGA prototypes to lower-cost structured ASICs inside one portfolio, pressuring them to build or buy equivalent ASIC-migration capabilities.
  • Small fabless silicon startups with niche design skills become acquisition targets, since Intel has demonstrated it will buy teams of this size to fill capability gaps rather than develop them internally.

Third-order effects

  • If the pattern holds, Intel's programmable business consolidates around a stack of absorbed specialist teams — Altera, eASIC, NetSpeed, Centaur engineers — which changes what a standalone version of that unit looks like should Intel proceed with separating it from the parent company.
  • The broader structure emerging is large semiconductor firms using serial small acquisitions to assemble workload-specific silicon portfolios, blurring the line between FPGA vendors and ASIC houses.

The trend: Intel is assembling a workload-specific silicon portfolio by folding small fabless design teams into its programmable unit — a business it later moves to separate from the parent company.