Memory standards organization JEDEC says DDR5 DRAM specification will be finalized next year and be twice as fast as DDR4
More DDR memory is on the way, despite many predictions that its time would soon be up. — Development of specifications for the new DDR5 DRAM has started …
Context & Ripple Effects
In April 2017, JEDEC formally began developing the DDR5 DRAM specification, pushing back against predictions that the DDR era was winding down — the target was a standard finalized the following year and roughly twice as fast as DDR4. The timeline slipped: the final DDR5 SDRAM spec landed in mid-2020, defining DDR5-6400, dual 32-bit channels, and 128 GB UDIMMs.
What followed validated the bet. SK Hynix shipped the first DDR5 chips months later at lower voltage than DDR4, Samsung pushed densities toward record 1TB RDIMMs via its 32Gb die, and by 2025 the DDR4-to-DDR5 handoff was tight enough that speculation over CXMT halting DDR4 output helped drive a sharp price spike.
First-order effects
- Memory vendors redirect R&D and fab planning toward DDR5, while JEDEC's 'finalized next year' target sets the clock for chipset and platform designers who must build around a spec that does not yet exist.
Second-order effects
- As DDR5 ramps — SK Hynix's launch chips, then Samsung's high-density modules for servers — DDR4 becomes the legacy node, and any supplier pulling out of it (as CXMT is speculated to have done) squeezes remaining DDR4 supply and lifts prices across both generations.
Third-order effects
- The multi-year arc from spec draft to volume silicon shows how thoroughly JEDEC's cadence structures the industry: server capacity per module (128 GB UDIMMs, terabyte-class RDIMMs) and the eventual DDR4 sunset are decided by standards committees years before buyers see the hardware.
The trend: DRAM generational transitions are stretching into multi-year programs where the standards body's schedule, not chip availability, dictates when servers and PCs can move to the next memory generation.