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TEXXR

Chronicles

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Sources: TSMC is informing Chinese customers using its 16nm or better tech that it cannot ship orders unless they use a US “white list” chip packaging supplier

Cheng Ting-Fang / Nikkei Asia :

Nikkei Asia Cheng Ting-Fang

Context & Ripple Effects

TSMC had already narrowed Chinese access to advanced AI-chip production through a reported halt on manufacturing 7nm-and-below AI chips and a subsequent US-directed shipment halt for advanced AI designs.

The reported packaging condition extends the compliance checkpoint beyond wafer fabrication: a qualifying downstream supplier now determines whether affected orders can move. That is significant because it reaches customers using 16nm-class technology, not only the most advanced nodes.

First-order effects

  • Chinese customers using TSMC's 16nm or more advanced processes must route packaging through a US “white list” supplier or face an inability to receive shipments.
  • TSMC takes on a more active role in verifying the packaging leg of affected customer orders, making supplier selection an immediate delivery condition.

Second-order effects

  • Approved packaging suppliers become a scarce compliance gateway for affected Chinese customers, increasing the importance of qualification capacity and commercial access alongside wafer supply.
  • Chinese chip developers that relied on other packaging routes will need to alter their supply chains or accept disrupted delivery schedules; the constraint now applies at a broader process range than the earlier reported 7nm AI-chip limits.

Third-order effects

  • If this approach persists, export-control compliance will increasingly be enforced across the semiconductor value chain rather than solely at the foundry, turning packaging into a strategic control point.
  • The pattern favors supply chains with pre-qualified, politically acceptable alternatives, reinforcing a split between globally interoperable production networks and China-facing routes.

The trend: This is part of a broader shift from node-specific chip restrictions toward supply-chain controls that govern which partners can complete and deliver semiconductor products.