Sources and analysis: four of the eight CPUs in the Kirin 9000S SoC use Arm designs and four use Huawei-modified Arm designs, HiSilicon made the GPU, and more
Facing US sanctions, Chinese company emulates Apple by using its own designs in chips for Mate 60 Pro
Context & Ripple Effects
Earlier teardown reporting identified the Mate 60 Pro's Kirin 9000S as a China-fabricated 7nm chip. This report adds architectural detail: Huawei’s chip effort combines licensed Arm-derived CPU designs with in-house modifications and a HiSilicon GPU.
The mixed design approach also follows Arm’s 2019 determination that it could continue supplying Huawei with Armv8-A and next-generation architecture designs. The distinction matters because the chip is neither wholly external nor wholly proprietary.
First-order effects
- Huawei gains a more detailed account of the Kirin 9000S’s division of labor: four CPU cores use Arm designs, four use Huawei-modified Arm designs, and HiSilicon supplies the GPU.
- The reported design preserves an Arm component in Huawei’s flagship SoC while demonstrating that Huawei can alter parts of the CPU implementation and control the graphics block.
Second-order effects
- Huawei’s chip roadmap must support a hybrid engineering model—maintaining compatibility with Arm-derived designs while investing in the teams needed to modify CPU cores and develop GPU IP.
- Because the SoC still incorporates Arm designs, the immediate result is reduced dependence on any single externally supplied block rather than a clean break from Arm-based architecture.
Third-order effects
- If repeated across products, this model could make vertically integrated, locally controlled SoC design a more practical response to technology-access constraints, even when complete architectural independence remains out of reach.
- The broader competitive advantage would shift toward sustained chip-design talent and integration capacity, not merely access to a foundry process or a single licensed core design.
The trend: This is one data point in the move toward second-source compute strategies that pair established architectures with increasingly proprietary silicon blocks.