Arizona Governor Katie Hobbs says TSMC and state authorities are talking about adding advanced chip packaging capacity to the chipmaker's plants in Phoenix
Context & Ripple Effects
TSMC’s Arizona buildout had already been framed as potentially extending beyond its initial facility, while construction needs were drawing additional Taiwan-based workers. The packaging discussions would broaden that local manufacturing arc from wafer fabrication toward more of the chip-production chain.
The idea also foreshadowed TSMC’s later Arizona advanced-packaging plant plan and sits alongside Amkor’s planned advanced-packaging campus in Arizona, indicating that packaging was becoming a meaningful focus for the state’s semiconductor cluster.
First-order effects
- Arizona and TSMC can assess whether Phoenix facilities need advanced packaging alongside wafer fabrication, potentially widening the scope of the company’s local footprint.
- A packaging addition would make the Phoenix site more relevant to customers that need finished multi-die chips rather than fabricated wafers alone.
Second-order effects
- The prospect raises the value of local suppliers, construction capacity, and specialized technical labor already being assembled for the fab buildout, including the additional Taiwan-based workers sent to accelerate construction.
- Other packaging providers and chipmakers would face a stronger incentive to position capacity near Arizona fabrication sites if customers value a more geographically integrated production flow.
Third-order effects
- If fabs and advanced packaging increasingly co-locate in the US, semiconductor industrial policy will be tested on whether it can support complete production ecosystems, not merely wafer capacity.
- The pattern points toward packaging becoming a strategic capacity constraint and investment target alongside leading-edge fabrication, though talks alone do not establish a final project or timeline.
The trend: Advanced packaging is moving from a downstream service toward a core part of regional semiconductor-capacity planning.