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VMware partners with Samsung, AMD, and the RISC-V Keystone community to accelerate the adoption of confidential computing, which encrypts data as it's processed

Mike Wheatley / SiliconANGLE :

SiliconANGLE Mike Wheatley

Context & Ripple Effects

Confidential computing has been organizing since 2019, when Microsoft, Google, Intel, IBM, Red Hat and others formed the Confidential Computing Consortium to standardize encrypting data in use, with AMD joining a year later alongside Nvidia and Facebook. Cloud-side, Google Cloud already productized the idea with Confidential VMs and Assured Workloads for Governments, so the technology has a hyperscaler reference implementation.

VMware's move extends an established playbook: it previously partnered with Amazon to run its infrastructure software on AWS and with Nvidia on virtualized GPUs for AI workloads. By pulling in Samsung, AMD, and the RISC-V Keystone community, it is now trying to make encrypted processing a feature of the virtualization layer itself rather than a per-cloud offering.

First-order effects

  • AMD gains a hypervisor-level distribution channel for its confidential-computing silicon beyond the consortium route it took in 2020, while Samsung and the Keystone project get enterprise-software validation for RISC-V-based trusted execution.

Second-order effects

  • Google Cloud's Confidential VMs set the commercial benchmark, so VMware-backed deployments pressure other cloud providers to match encryption-in-use natively or risk enterprises standardizing on whichever stack makes compliance easiest.

Third-order effects

  • If hardware vendors keep adding trusted execution environments across x86 and RISC-V, encrypting data during processing shifts from a premium compliance feature toward a default expectation of virtualized infrastructure, with standards bodies like the Consortium deciding how portable those guarantees are across chip architectures.

The trend: Data-in-use encryption is moving from hyperscaler-specific products toward a standardized layer spanning multiple chip architectures, with virtualization vendors as the integration point.