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Chronicles

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The Intel Skylake Mobile and Desktop Launch, with Architecture Analysis

Ian Cutress / AnandTech :

AnandTech Ian Cutress

Context & Ripple Effects

This analysis closes out the launch window that began with Intel's gamer-targeted sixth-gen 'Skylake' debut in early August 2015 and the follow-on reveal of the full [[a:832398|Skylake Y, U, H, and S series spanning desktops, notebooks, convertibles, and compute sticks]]. What was missing until now is the deep architectural read: where the IPC, power envelope, and platform features actually moved versus prior generations.

It matters because Skylake is the hinge point between the 14nm generations that preceded it — including the Broadwell-E high-core-count desktop line tested in mid-2016 — and the 10nm mobile chips Intel shipped years later, when AnandTech's retrospective on Ice Lake's development history traced the long road out of this node.

First-order effects

  • OEMs building desktops, notebooks, convertibles, and compute sticks now have concrete per-series guidance on which of the Y/U/H/S parts fit which thermal class, replacing spec-sheet assumptions with measured behavior.
  • PC builders and gamers who bought into the sixth-gen desktop launch can see whether the efficiency gains and multi-4K-display support flagged in the earlier Skylake detail coverage hold up under independent testing.

Second-order effects

  • The Broadwell-E halo parts now sit against a mainstream Skylake baseline whose platform features are documented, sharpening the value question for buyers deciding between core count and newer architecture.
  • Notebook vendors gain ammunition to reposition convertibles and compute sticks around Skylake's lower-power SKUs, since the architecture analysis quantifies what the efficiency claims actually deliver.

Third-order effects

  • If the pattern holds from Skylake through the later 10nm Tiger Lake-H mobile generation, each architecture analysis becomes the reference point the next node's benchmarks are judged against — making these launch-day teardowns durable purchasing guides rather than day-one news.
  • The multi-year gap between this 14nm launch and the 10nm mobile chips covered in the Ice Lake retrospective suggests process-node delays, not architecture design, set the real cadence of Intel's client roadmap.

The trend: Intel's client CPU story from Skylake through Ice Lake and Tiger Lake-H shows architecture launches increasingly defined by process-node timing, with independent deep-dive analyses becoming the lasting record of each generation's real gains.