A deep dive into AMD's Zen 6 EPYC Venice: uses TSMC's N2P, the 9686F often beats Nvidia's Vera, a dual 9996 is up to 93% faster than a dual Zen 5 9965, and more
Our first look at Zen 6, both under the hood and in real-world applications. … AMD's EPYC ‘Venice’ CPUs are the first to debut …
Tom's HardwareJake Roach
Context & Ripple Effects
AMD had already positioned Venice as the debut vehicle for its first TSMC 2nm silicon in 2025. This analysis adds performance and implementation detail to that roadmap, while AMD’s Venice-X variant with 1,152 MB of stacked L3 cache shows the family is being segmented for distinct data-center workloads.
The comparison with NvidiaVera gives Venice a competitive reference point beyond AMD’s own prior generation: the reported dual-socket gain over Zen 5 turns an architectural launch into a concrete refresh argument for server buyers.
First-order effects
AMD can use the reported 9686F results against Nvidia Vera and up-to-93% dual-socket gain for the 9996 versus dual Zen 5 9965 to position Venice as a performance-led server upgrade.
Data-center buyers evaluating AMD and Nvidia CPUs gain workload-specific benchmark points rather than relying on core counts or roadmap claims alone.
Second-order effects
Nvidia’s Vera becomes a more explicit procurement comparison for CPU-bound enterprise and AI-agent workloads, raising the importance of independently reproducible application benchmarks.
The reported use of TSMC N2P makes advanced-node execution part of AMD’s server proposition, alongside product differentiation such as the cache-heavy Venice-X design.
Third-order effects
If Venice’s frequency-oriented and high-core-count parts sustain their reported advantages across workloads, server CPU competition will increasingly split into tuned variants rather than a single flagship metric.
Advanced process-node access and workload-level performance evidence are becoming interdependent sources of data-center CPU differentiation.
The trend: Data-center CPU vendors are segmenting architectures and using workload benchmarks to compete for AI and enterprise deployments, with leading-edge process technology enabling the trade-offs.
AMD EPYC 9996 Benchmarks Show Unparalleled Performance With 256 Zen 6C Cores
Phoronix
Michael Larabel on x
AMD EPYC 9686F Linux Benchmarks: 96 Zen 6 Cores At Up To 5.3GHz
@highyieldyt
@highyieldyt on x
Great Zen 6 article from @ChipsandCheese9, especially this part:
@aschilling
Andreas Schilling on x
While AMD says the CCDs for the Venice CPUs (CCD12 and CCD32) are manufactured using TSMC's N2 process, the CCDs for Verano are said to use the N2P process. Does that make sense? What is the reason? Is it a matter of N2 vs. N2P capacity, or are there technical reasons?
@chipsandcheese9
@chipsandcheese9 on x
Hello you fine Internet folks, Today we're looking at AMD's next-gen Zen 6 CPU core family. We'll explore the changes from Zen 5 and what the differences between Zen 6 and Zen 6c tell us about AMD's approach to microarchitecture. Hope y'all enjoy! https://chipsandcheese.com/...
@aschilling
Andreas Schilling on x
At this time, AMD has not provided any information regarding a reduction in the chip size of the Zen 6c core compared to the Zen 6 core. However, in a conversation with Mike Clark, he told me that the focus was less on chip area and more on performance.
@techepiphanyyt
@techepiphanyyt on x
AMD Zen 6 in detail: With +27 percent IPC, it's the fastest AMD processor $AMD
@firstadopter
Tae Kim on x
AMD is kicking ass ServeTheHome: “Venice is just a big upgrade across the board” “That means that AMD will benefit from an EPYC 7002 “Rome” like cycle since other vendors (e.g. storage vendors) will have to validate their platforms first on Venice
@aschilling
Andreas Schilling on x
I did visit @AIatAMD in Depth 2026 last week in Las Vegas. There, AMD revealed some additional details about the Zen 6 architecture and the Venice platform, which I have summarized in detail in the following article: https://www.hardwareluxx.de/ ...
@amd
@amd on x
6th Gen AMD EPYC SP7 processors are now available. Built on the new “Zen 6
@pirat_nation
@pirat_nation on x
AMD's next-gen server CPUs are here, and they're bringing a huge performance boost. The new EPYC 9006 Venice processors use AMD's Zen 6 architecture and promise up to 27% better performance per clock than Zen 5. > Up to 256 cores in a single CPU. > Up to 27% higher IPC in AI and …
@aschilling
Andreas Schilling on x
This is EPYC 9006 #Venice with Zen 6 and Zen 6c. The first one shows Venice with Zen 6c and the bigger CCD32. The second one shows Venice with Zen 6 with the smaller CCD12. No info on die sizes and transistor count so far.
@ryansmithat
Ryan Smith on x
Zen 6 is here at last. Even though AMD has not made any paradigm-shifting architecture changes, Zen 6 is still AMD's biggest gen-on-gen IPC uplift ever for the Zen architecture. The company has put TSMC's N2 process (and their own brains) to very good use here
r/TechHardware
r on reddit
AMD Zen 6 EPYC ‘Venice’ release review - overshadowed by AMD GPU bug that can damage SSDs?
r/TechHardware
r on reddit
AMD's Zen 6 Family: Feeding the Beast (chips and cheese)
r/hardware
r on reddit
Chips and Cheese: “AMD's Zen 6 Family: Feeding the Beast”
r/AMD_Stock
r on reddit
AMD Zen 6 EPYC ‘Venice’ deep dive and benchmarking - 9686F outclasses Nvidia's Vera, dual EPYC 9996 with 1,024 threads delivers up to 93% performance gain gen-on-gen