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Chronicles

The story behind the story

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Sources: Nvidia asked Samsung, SK Hynix, and Micron to use TSMC's 3nm process to produce NVHBM memory base dies; Samsung agreed, its first use of TSMC for HBM

Samsung Electronics (005930.KS) will use TSMC's (2330.TW) 3-nanometre process to produce base dies for Nvidia's (NVDA.O) …

Reuters Kyu-Seok Shim

Context & Ripple Effects

Samsung’s push to win Nvidia memory business had already moved from HBM4 qualification to its stated first commercial HBM4 shipments in 2026. The reported NVHBM arrangement would extend that effort beyond supplying stacked memory into a supply chain that uses a rival foundry for the base die.

That is a notable reversal of the competitive boundary implied by Samsung’s earlier 3nm manufacturing milestone. Reuters reports that Nvidia asked Samsung, SK Hynix and Micron to make NVHBM base dies on TSMC’s 3nm process; Samsung’s participation remains source-reported rather than formally confirmed.

First-order effects

  • Samsung would source a critical NVHBM base-die step from TSMC for Nvidia, rather than relying solely on its own manufacturing process, if the reported arrangement proceeds.
  • Nvidia would gain a common 3nm base-die manufacturing path to offer across Samsung, SK Hynix and Micron, while Samsung gains another route to qualify for Nvidia memory demand.

Second-order effects

  • SK Hynix and Micron face pressure to decide whether to support Nvidia’s requested base-die approach, making compatibility with Nvidia’s custom memory design a competitive requirement alongside HBM performance.
  • TSMC stands to become more deeply embedded in the HBM supply chain, while Samsung must balance a customer opportunity against dependence on a foundry rival for this component.

Third-order effects

  • If Nvidia can standardize the logic base die while sourcing stacked memory from multiple vendors, HBM competition may shift further toward memory stacks, packaging and qualification rather than a fully vertically integrated chip design.
  • The reported arrangement points to a supply-chain model in which AI-chip designers coordinate foundry and memory suppliers across traditional competitive lines to reduce component bottlenecks.

The trend: Custom AI memory is turning HBM into a coordinated multi-supplier system, with chip designers increasingly specifying the base logic as well as the memory stack.

Discussion

  • @nano_arun Arun Mampazhy on x
    “Samsung to use TSMC technology for Nvidia's next-generation memory chips, Seoul newspaper reports” When the times are crazy, interesting things happen https://www.reuters.com/...