Cerebras Systems unveils the world's biggest semiconductor chip with 400K cores, 1.2T transistors, and 18GB of SRAM memory, fit in the size of a silicon wafer
Tucked in the Los Altos hills near the Stanford University campus, in a low-slung bunker of offices across from a coffee shop …
Context & Ripple Effects
This is the founding move in what became Cerebras Systems' whole franchise: abandoning the reticle limits that cap ordinary chips and bonding up an entire wafer into a single 400K-core processor with 18GB of on-chip SRAM. The bet only paid off because it kept iterating — the follow-up CS-1 system put the chip at Argonne National Lab within months, and the line has since scaled through the 2.6T-transistor WSE-2 to today's TSMC-built 5nm WSE-3.
First-order effects
- Cerebras jumps from stealth to shipping specs, giving AI training customers their first credible alternative to networks of small chips — a path Argonne National Lab validated when it took the first CS-1 systems for research.
Second-order effects
- The New Yorker's framing of wafer-scale as 'one possibility for AI chips to keep up with Moore's law' forces accelerator rivals to answer the scale question, while TSMC emerges as the manufacturing partner that makes each successive generation economically buildable.
Third-order effects
- If the generational cadence holds — 1.2T transistors to 2.6T to 4T across three chips — AI compute could bifurcate between wafer-scale specialists selling integrated systems and conventional GPU vendors, with national labs and model trainers as the proving-ground buyers.
The trend: AI accelerators are splitting into two camps — ever-larger monolithic wafers versus fleets of smaller chips — with Cerebras' wafer-scale line as the clearest test of whether scale-up beats scale-out.