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Raspberry Pi Foundation announces $25 Pi 3 Model A+, with a quad-core 1.4GHz CPU but less RAM and USB ports than the $35 Model B+

Jacob Kastrenakes / The Verge :

The Verge Jacob Kastrenakes

Context & Ripple Effects

Raspberry Pi Foundation is slicing its lineup by price rather than performance: the new $25 Model A+ carries the same 1.4GHz quad-core CPU as the Model B+ launched in March 2018, but trims RAM and USB ports to hit the lower sticker. That continues a cadence set back when the Pi 2 arrived as a quad-core $35 board in 2015 — keep the flagship at $35 and open a cheaper rung below it.

The trim-down matters because the Foundation has since made tiered pricing a habit: the Pi 4 launched with a 1GB model at $35, and years later the Pi 5 added a 2GB model at $50 beneath the 4GB/8GB tiers. The A+ is the earliest data point in that playbook.

First-order effects

  • Cost-sensitive buyers — classroom deployments, embedded projects, bulk orders — get a $25 entry point with the same CPU as the $35 Model B+, paying only for the RAM and ports they skip.
  • The Foundation now sells two boards on identical silicon, so its margin story shifts from chip generation to configuration: the A+ monetizes the same SoC twice.

Second-order effects

  • Rivals in the low-cost single-board market face a cheaper Raspberry Pi option without any performance trade-off at the CPU level, pressuring them to match on price-per-tier rather than spec sheets.
  • Accessory and case makers gain a second 2018-era board form factor to support, while the smaller port count nudges some buyers toward USB hubs and add-ons — adjacent spend that follows the cheaper board.

Third-order effects

  • If the pattern holds — and the later 1GB Pi 4 and 2GB Pi 5 tiers suggest it does — single-board computers settle into a structure where one processor family spans multiple price points, with RAM and I/O as the pricing levers and the $25–$35 band as the volume anchor.

The trend: Single-board computer vendors are segmenting price tiers by cutting RAM and ports while sharing one CPU across the lineup, turning configuration — not chip generations — into the product ladder.