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Chronicles

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Baidu unveils two AI chips: the M100 for efficient MoE inference, coming in early 2026, and the M300 for training super-large multimodal models, coming in 2027

The M100 and M300 provide ‘powerful, low-cost and controllable AI computing power’ to support the nation's self-reliance push, the firm says

South China Morning Post Ben Jiang

Context & Ripple Effects

Baidu’s roadmap extends an in-house chip effort that had already reached second-generation Kunlun mass production and was later supplemented by orders for Huawei AI chips as it sought alternatives to Nvidia.

The broader coverage now shows domestic suppliers competing across both training and inference: Alibaba reported substantial Zhenwu 810E deliveries before introducing a newer training-and-inference chip.

First-order effects

  • Baidu gains a staged internal-compute roadmap: the M100 is aimed at efficient MoE inference in early 2026, while the M300 is reserved for training super-large multimodal models in 2027.
  • The split lets Baidu align chip design with two distinct workloads rather than present one processor as a universal AI-compute answer.

Second-order effects

  • Baidu’s low-cost, controllable-compute positioning sharpens comparisons with domestic alternatives, including Alibaba’s Zhenwu M890 roadmap for training and inference.
  • Model teams and cloud customers evaluating domestic hardware will have more workload-specific options, making software compatibility and deployment efficiency more consequential alongside raw chip capability.

Third-order effects

  • If such roadmaps are delivered on schedule, China’s AI-compute market could become more heterogeneous, with specialized inference and training silicon deployed alongside general-purpose accelerators.
  • The durable shift is toward vertically integrated AI stacks in which model developers treat proprietary or domestic compute supply as a strategic capability, though adoption will depend on execution and usable software ecosystems.

The trend: AI companies are separating inference and training hardware strategies while building more controllable domestic compute stacks.