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Chronicles

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A look at embedded and immersion chip-cooling tech; industry sources indicate Nvidia is mulling 6,000W to 9,000W TDP for its next-gen GPUs, up from ~1,200W now

It is going to get hot.  —  The power consumption of AI GPUs has steadily increased in recent years and is expected …

Tom's Hardware Anton Shilov

Context & Ripple Effects

AI accelerators had already crossed the 1 kW threshold, prompting manufacturers to adopt direct liquid cooling for high-power chips. Nvidia’s DGX H100 systems also illustrated how cooling had become part of the server product rather than a peripheral concern.

The reported 6,000W–9,000W range would extend an existing rack-design challenge: Nvidia had previously asked suppliers to revise Blackwell rack designs amid overheating-related changes. The key issue is no longer only chip performance, but whether facilities can remove heat at the density the chips imply.

First-order effects

  • If Nvidia proceeds, server and rack designs for its next-generation GPUs would need cooling systems beyond the roughly 1,200W design point cited for current products, making embedded and immersion approaches more consequential.
  • Data-center operators planning deployments would need to account for substantially higher per-GPU power delivery and heat rejection requirements, not simply accelerator availability.

Second-order effects

  • Cooling-system, rack, power-distribution, and facility suppliers would face a tighter integration role in Nvidia-based deployments; design qualification could become a gating item alongside GPU supply.
  • Competitors can differentiate not only on compute performance but on performance per watt and the ease of deploying their systems within existing data-center thermal and electrical limits.

Third-order effects

  • If accelerator power continues rising at this pace, AI infrastructure procurement is likely to shift toward rack- and facility-level economics, with cooling architecture increasingly determining where new compute can be installed.
  • The pattern points to a more constrained AI buildout in which chip roadmaps, server design, and data-center power infrastructure must be coordinated rather than scaled independently.

The trend: AI compute is becoming an infrastructure-integration problem, as rising accelerator power density pushes cooling and power delivery into the core product decision.