Taiwan-based Powerchip plans to build a ~$5.3B chip facility in northeast Japan with financing from SBI and Japan, aiming to produce 40nm and 55nm chips by 2027
Context & Ripple Effects
Japan's chip-manufacturing push already included TSMC's planned 22nm and 28nm Japan plant, backed by government support. Powerchip extends that effort into older-node production rather than directly competing at the leading edge.
The project also sits beside Japan's later support for Rapidus's 2nm ambitions, underscoring a policy mix that spans mature and advanced manufacturing rather than a single technology bet.
First-order effects
- Powerchip gains a Japan-based manufacturing expansion route, while SBI and Japan become financing partners in a capital-intensive fab project.
- If delivered as planned, the facility adds intended 40nm and 55nm output in Japan by 2027, broadening local supply at mature process nodes.
Second-order effects
- The investment raises the strategic value of Japan as a location for foundry capacity, increasing pressure on other suppliers to pair expansion plans with local financing or policy support.
- Customers needing mature-node chips could gain another prospective regional sourcing option, though the project must first clear the execution and ramp risks inherent in new fabs.
Third-order effects
- Japan's semiconductor strategy is taking a portfolio form: subsidized or locally financed capacity across both mature nodes and frontier-node programs such as Rapidus's additional state-backed expansion.
- If multiple projects reach volume production, competition will increasingly hinge not only on process technology but also on which countries can assemble durable financing, infrastructure, and customers for fabs.
The trend: National semiconductor policy is broadening from headline-grabbing leading-edge projects to a fuller domestic capacity stack that includes mature-node production.