Delos Data, which develops network chips and software to connect AI chips in a data center, raised $100M from Matrix, Playground, Socratic Partners, and others
Context & Ripple Effects
Delos Data enters an AI interconnect field that has already drawn specialist funding: Enfabrica raised a $125M round for networking chips that scale GPU data centers in 2023, while Aria Networks raised $125M in 2026 for a chip-agnostic AI-native network. Delos’s raise directs another large venture round toward the links between AI chips rather than the chips themselves.
The participation of Matrix, Playground and Socratic Partners gives Delos funding to develop its networking chips and software as data-center operators confront scaling constraints beyond processor supply.
First-order effects
- Delos Data has $100M in new backing from Matrix, Playground, Socratic Partners and other investors to advance its AI-chip connectivity hardware and software.
- The company’s Nonstop AI Data Interface and reference architecture gain a funded route to compete for deployment in AI data centers.
Second-order effects
- Enfabrica and Aria Networks face another well-capitalized specialist seeking to make the data-center interconnect a distinct purchasing and design decision for AI-chip deployments.
- AI data-center builders evaluating heterogeneous chip systems gain another vendor focused on the networking layer, increasing pressure to demonstrate latency and efficiency at the system level.
Third-order effects
- The funding points to AI infrastructure investment broadening from compute chips into the networking fabric needed to keep clusters productive, making interconnect architecture a more consequential layer of the AI factory.
- If specialist vendors continue to attract rounds of this scale, data-center networking may evolve into a separate competitive market alongside accelerators rather than a component chosen only with the server.
The trend: AI infrastructure capital is moving beyond accelerators toward the interconnect hardware and software that determines how effectively large chip clusters operate.