/
Navigation
Chronicles
Browse all articles
Explore
Semantic exploration
Research
Entity momentum
Nexus
Correlations & relationships
Story Arc
Topic evolution
Drift Map
Semantic trajectory animation
Posts
Analysis & commentary
Pulse API
Tech news intelligence API
Browse
Entities
Companies, people, products, technologies
Domains
Browse by publication source
Handles
Browse by social media handle
Detection
Concept Search
Semantic similarity search
High Impact Stories
Top coverage by position
Sentiment Analysis
Positive/negative coverage
Anomaly Detection
Unusual coverage patterns
Analysis
Rivalry Report
Compare two entities head-to-head
Semantic Pivots
Narrative discontinuities
Crisis Response
Event recovery patterns
Connected
Search: /
Command: ⌘K
Embeddings: large
TEXXR

Chronicles

The story behind the story

days · browse · Enter similar · o open

Researchers demo cheaper resistive random access memory fabrication, raising prospect of terabyte chips for smartphones

Super-Dense Computer Memory  —  Researchers have discovered a new way to make chips that could pack terabytes into smartphones.  —  A novel type of computer memory could …

MIT Technology Review Kevin Bullis

Context & Ripple Effects

Resistive RAM's terabyte promise is not new: Crossbar claimed in 2013 that RRAM would explode the $60B flash memory market with a terabyte on a chip, and the idea of nanotech-enabled terabyte storage dates back at least to Wired's 2007 thumb-drive story. What has kept those claims from reaching phones is fabrication cost — RRAM worked in the lab but not at prices NAND buyers would pay.

The new research attacks exactly that bottleneck, demonstrating a cheaper fabrication route for RRAM. It lands alongside other post-NAND bets from the same era, including IBM's racetrack memory built with existing tools in 2011 and Intel and Micron's continued shrinking of NAND flash, which shows incumbents still have runway.

First-order effects

  • Crossbar and other RRAM developers gain their strongest argument yet against the cost objection that has kept the technology out of volume production since the 2013 market-entry claim.
  • Smartphone makers evaluating next-generation storage now have a credible path to terabyte-class chips that does not depend solely on NAND scaling.

Second-order effects

  • NAND incumbents like Intel and Micron face pressure to accelerate node shrinks or develop their own resistive-memory roadmaps rather than cede the high-density end.
  • If RRAM fabrication costs approach NAND levels, handset designers can plan for storage tiers well above current capacities, shifting bill-of-materials weight toward memory.

Third-order effects

  • A working low-cost RRAM process would mark the first real crack in NAND's monopoly on non-volatile memory, splitting the market between scaled flash and resistive alternatives much as DRAM and NAND split decades ago.
  • The pattern — lab demos in 2007, startup market claims in 2013, cheaper fabrication by 2014 — suggests emerging memories mature through fabrication-economics breakthroughs, not physics ones, keeping the lab-to-fab gap the key uncertainty.

The trend: As NAND scaling delivers diminishing returns, a wave of alternative non-volatile memories — RRAM, racetrack, memristor variants — is competing on fabrication cost to break into mainstream storage.